Our offshore center is well equipped to design and develop boards from pre- design stage to final gerber. Be it a processor card or a controller card or a specific application card we can architect, design, layout and also get the prototype.

We have developed multilayer, high density and very complex boards with large BGA packages. Our engineering team is very familiar with memory technologies, signal integrity and routing constraints with high-speed. Our Design centers and experienced designers can provide the following services:

• Systems Architecture
• Engineering Specification
• Firmware, Device Driver, RTOS integration
• PCB design
• Signal integrity, EMI
• Agency certification
• Mechanical, Power Supplies, Cabling

Our offshore center is well equipped to design and develop boards from pre- design stage to final gerber. Be it a processor card or a controller card or a specific application card we can architect, design, layout and also get the prototype.

We have developed multilayer, high density and very complex boards with large BGA packages. Our engineering team is very familiar with memory technologies, signal integrity and routing constraints with high-speed. Our Design centers and experienced designers can provide the following services:

• Systems Architecture
• Engineering Specification
• Firmware, Device Driver, RTOS integration
• PCB design
• Signal integrity, EMI
• Agency certification
• Mechanical, Power Supplies, Cabling

For your most stringent vertical ASIC/IP requirements, we work with you at all capacities from specification, abstract architecture modeling, implementation, verification and validation. We have complete range of skills and state of the art EDA tools knowledge that is critical to a successful tape-out and final silicon testing. Our expertise spans the entire ASIC/SoC design spectrum from specification to GDSII tape-out to silicon verification. We offer services that address most of your critical design needs or we can customize our services based on your specific requirements.

• Architectural partitioning and trade-off analysis
• C-modeling/Behavioral modeling and testing
• RTL design (Verilog/VHDL/Mixed, Synthesis & Physical synthesis
• Functional verification – Module and block level, Formal Verification Static timing analysis, Design for Test/Test coverage and analysis
• Power analysis, Data path synthesis, Design reuse
• Verification specification development, Test bench design and implementation
• Emulation & acceleration techniques, Hardware/software co-verification
• Customization/Integration of third party IP with customer’s logic
• IC layout design, IP verification services, Clock tree generation
• Static Timing Analysis and Cross talk analysis
• Post clock tree optimization, Routing, RC Extraction
• Post route optimization, GDSII

Following are Key tools experience

• Board and PCB design – Signal Integrity, Schematic Packages and Layout tools – extensively used Spice, Sigxplorer, Spectraquest; Orcad, Concept, Viewdraw, Expedition (Mentor Graphics), PADS, Cadence-Allegro during different phases of the board/PCB design.
• Synopsys – Design Compiler, Physical Compiler, Test Compiler, PrimeTime, Formality, Power Compiler, DesignWare.
• Simulators – VCS, ModelSim, Verilog-XL, NC-Sim (VHDL/Verilog).
• Cadence – SP & R , Silicon Ensemble, SoC Encounter, Nanoroute, PKS, Dracula, DVS/LRC, Celtic, STA etc.
• Verification tools – VERA, SpecMan, Quickturn’s Palladium Emulators.
• FPGA design and Prototyping – Actel (Mil883-B), Xilinx and Altera, Synplicity Synplify, Synopsys FPGA Compiler II, Mentor Graphics – Leonardo Spectrum, Quartus and ISE design tools
• MAX + plus II, Quartus II design tools (Altera).
• ISE design tools (Xilinx).